Astera Labs (NASDAQ:ALAB) executives outlined the company’s strategy and product roadmap for rack-scale AI infrastructure during a fireside chat at Needham’s 28th Annual Growth Conference, highlighting accelerating customer engagement in scale-up switching, continued strength in PCIe retimers, and preparations for future optical connectivity.
Rack-scale connectivity focus and product portfolio
Co-founder and CEO Jitendra Mohan said Astera Labs’ founding vision has been to provide “all of the connectivity infrastructure” customers need, noting that the basic unit of AI compute is shifting from a server to a full rack. He described Astera’s role as supplying the switching, signal conditioning, and software needed to connect GPUs and other accelerators at rack scale.
- Scorpio P and Scorpio X fabric switches: Scorpio P targets PCI Express connectivity (typically scale-out), while Scorpio X targets GPU-to-GPU scale-up connectivity.
- Aries retimers: Deployed as chip-down components or within active electrical cables for both scale-out and scale-up.
- Taurus products: Ethernet-focused signal conditioning, typically deployed as active electrical cables (AECs) with an Astera “smart cable module.”
- Leo products: CXL-based memory connectivity aimed at alleviating memory bottlenecks by enabling DDR5 memory expansion.
Mohan said all product lines are in production and “contributing meaningfully” to revenue.
Competitive positioning: software-first architecture and customer trust
When asked what ties the portfolio together, Mohan described three core competencies:
- A software-first architecture with embedded microcontrollers to enable flexibility and customization.
- Cosmos software framework that unifies Astera’s chips, enables customization, and gathers diagnostics to help customers manage large deployments.
- Customer relationships and trust developed over seven to eight years, which Mohan said provides roadmap visibility and helps prioritize what features—and what products—to build.
On competitive lead, Mohan said Astera is the “de facto choice” for PCIe retimers. He added the company is working to establish leadership in PCIe switching with PCIe 6, noting Astera was first to introduce PCIe 6 switching and retimer families. Ethernet, he said, is more of a “share game” where customers typically want multiple sources.
Scale-up switching momentum: PCIe today, UA-Link ahead
Needham’s Quinn Bolton focused on scale-up networking, including AWS announcements at re:Invent around a PCIe-based scale-up topology for Trainium3 and future plans involving UA-Link and NVLink. Mohan said the updates were positive for Astera and not a surprise internally, emphasizing Astera’s “full portfolio” on PCI Express and close engagement with customers. He cited “10-plus engagements” for PCIe-based scale-up and said Scorpio X is on track to become the company’s largest product line over time.
Mohan also called AWS’s disclosure of UA-Link support the “first public admission” from the company, describing it as a positive industry signal. He expects customers building PCIe-based scale-up networks to transition over time to UA-Link, with initial UA-Link deployments potentially beginning in 2027 and gaining momentum in late 2027 and into 2028.
On how long PCIe scale-up lasts, Mohan said PCIe “will stick around longer than anybody believes,” citing customer engagements ramping through 2027 and 2028 and discussions already starting around PCIe 8. However, he also expects many PCIe scale-up users to move to UA-Link as it becomes established, noting that both are memory semantics-based protocols and software optimizations can translate.
NVLink Fusion and a new protocol-translation opportunity
Mohan said NVIDIA’s NVLink Fusion announcement opens a “new TAM” for Astera by allowing customers to pair NVIDIA’s NVL72 infrastructure (including NV switches) with their own compute arrays. He said Astera has one hyperscaler customer deploying such a solution and described it as a complex protocol translation problem—managing data flows, security, and links—rather than a simple retimer function. He added the opportunity can support “a healthy ASP” and has a higher attach rate because it is effectively one solution per XPU.
CPO, cables, retimers, and CXL: timing and outlook
Bolton asked about co-packaged optics (CPO) following Marvell’s acquisition of Celestial AI. Mohan said CPO is a “net increase in TAM” because optical solutions are more expensive than copper, but he also argued customers are reluctant to move to optics due to cost and power. He said Astera plans to develop an optical engine to add optical I/O to the Scorpio family, supported by the company’s acquisition of Xscape for packaging capabilities. Mohan emphasized Astera’s openness to multiple silicon photonics approaches, including working with third-party solutions based on customer preference.
On timing, Mohan said scale-out is likely the first place for CPO adoption because the alternative is pluggable optics, where CPO offers clear advantages. He suggested the timing could be 2027, 2028, or 2029, while optical scale-up is more of a 2028–2029 proposition.
For Taurus Ethernet AECs, Mohan said second-half 2025 growth was driven by one lead customer, supported by both increased deployments and share gains. He expects additional growth as the industry transitions from 400G to 800G, with Astera spending the first half of 2026 in qualification and expecting volume ramps in the second half.
Discussing go-to-market strategy versus competitors, Mohan said Astera supplies the smart cable module and firmware, while partners build the full cable—an approach he said provides hyperscalers supply chain diversity, avoids “margin stacking,” and reduces requalification burdens across applications.
On PCIe retimers, Mohan said Astera’s PCIe Gen 6 family is in full production and that the move from Gen 5 to Gen 6 can expand opportunity due to shorter signal reach, which can increase attach rates and ASPs. He also said that while NVIDIA’s reference designs have reduced retimer content, Astera has seen increased content in hyperscaler customizations of platforms such as Grace Blackwell and expects similar customization trends for Vera Rubin. He added that PCIe-based scale-up deployments represent a larger opportunity for retimers.
Finally, on CXL, Mohan acknowledged it has been “much slower to ramp” than the company’s other products, but he expects 2026 to be the year CXL begins deploying more broadly, with meaningful revenue contribution in the back half of the year. He cited a Microsoft blog post about deploying SAP HANA databases with CXL memory and said early customer exploration is also underway for CXL use in AI, including KV cache applications, though he said Astera is not yet counting revenue from those potential AI use cases.
VP, Treasurer and Investor Relations Nick Aberle closed by saying Astera expects to invest aggressively both organically and through selective bolt-on M&A, including acqui-hires for IP and additional engineering capacity, to capture what the company sees as expanding connectivity-driven opportunities.
About Astera Labs (NASDAQ:ALAB)
Astera Labs is a fabless semiconductor company that develops connectivity solutions for data center and cloud infrastructure. The firm focuses on addressing signal integrity and link management challenges that arise as server architectures incorporate higher-bandwidth processors and accelerators. Its technology is aimed at improving reliability and performance for high-speed interconnects used in servers, storage systems and compute accelerators.
The company’s product portfolio centers on silicon devices and accompanying firmware and software that enhance and manage high-speed links.
